This invention relates to integrated circuit (“IC”) devices, and more particularly IC structures that increase the resistance of the IC to certain kinds of memory errors due to such causes as alpha particles and atmospheric neutrons.
An event such as an alpha particle or atmospheric neutron travelling through the material of an IC can cause ionization of that material in the vicinity of the event. The electrical charge(s) resulting from that ionization can flow to the electrical circuitry of the IC and cause errors in that circuitry. For example, a memory cell may depend on a node of the memory cell remaining at a certain electrical potential (voltage) in order for the memory cell to hold a stored data value. A sufficiently rapid flow of a sufficiently large amount of electrical charge to that node as a result of an event like that described above may cause the node to deviate from the required potential and thereby cause the memory cell to “flip” to outputting an incorrect data value. This type of occurrence may be referred to as a single event upset (“SEU”). It may also be known as a soft error upset, soft error rate (“SER”), or the like. An SEU can cause the affected IC to malfunction. This can cause a system that includes the affected IC to malfunction. ICs tend to become more susceptible to SEU as IC feature sized decreases, which, of course, is one of the more important trends in IC fabrication.